error (Total 54157 Patents Found)

Error (54157 Patents Found)
A method and apparatus for displaying a waveform on an error performance analyzer are disclosed. A repeated base bit pattern is received. Then, at a first time and for each incremental time thereafter for a predetermined period of time, multivalued voltage, V M , is determined. The V M is determined by constructing a ...
A signal processor eliminates sidelobe response from signals produced by a spaced antenna array that forms a single beam using spatial frequencies. The signal processor also produces error signals. The signal processor uses a phase coherent local oscillator to simultaneously convert the wavefront signal from each eleme...
A method of and apparatus for continuous parity checking within a CMOS SRAM memory system. Each cell has added circuitry which permits continuous reading of the binary state of the cell. The states of each cell are combined to produce a parity determination for a given data array. By continuously monitoring parity in t...
A method and apparatus are provided for reading from a storage medium to form data values. A signal is generated from a sector on the storage medium and a section of that signal is identified as having a change in amplitude. A gain multiplier is activated to multiply that section of the signal by a gain value. The gain...
Provided is a method for correcting a non-line-of-sight (NLOS) error in a wireless positioning system that enhances the location accuracy of a mobile station by correcting location error caused by NLOS propagation when the mobile station is positioned in a wireless mobile communication environment, and a computer-reada...
Error protection based on a nonlinear code set may be used in a multiple input multiple output (MIMO) radio communications system. A decoder decodes received MIMO data streams and generates an automatic repeat request (ARQ) message for data units received for the MIMO data streams for each transmission time interval. A...
A cluster system includes a transmission side server cluster consisting of a plurality of computers, one of which is selected as a transmitting computer and at least another one of which is selected as a standby computer. When the transmitting computer transmits a message it received to a receiving side server, it also...
Disclosed herein is a system and method for measuring radiation temperature through filtration of optical error sources, which can measure surface temperatures of a heating substance within a heating furnace. The system comprises a front lens to collect infrared rays from a measuring target and from surroundings, a pin...
According to one embodiment a computer system is disclosed. The computer system includes memory. The memory includes two or more rows, where each row has a plurality of memory devices. The computer system also includes a chipset. The chipset includes a detection/correction circuit to detect single and double symbol err...
Various embodiments of the present technology may comprise methods and apparatus for error detection in an imaging system. The method and apparatus may comprise pixels arranged in rows and columns and an error detection circuit receiving pixel data generated by the pixels. The error detection circuit may detect errors ...
A gyroscope system may include a disc resonator gyroscope including a plurality of electrodes embedded in the disc resonator gyroscope. The electrodes may be configured for at least applying a drive voltage and a tuning voltage to the disc resonator gyroscope and for sensing operating parameters of the disc resonator g...
Various pipeline ADCs are disclosed that substantially compensate for interference or distortion that results from imperfections with various ADC modules of the pipeline ADCs. The pipeline ADCs include various ADC stages and various compensation stages that are coupled to the various ADC stages. The various ADC stages ...
A peak phase error circuit including phase difference logic and delay and register logic. The phase difference logic provides a pulse difference signal including at least one difference pulse indicative of a timing difference between selected edges of a pair of clock signals. The delay and register logic receives the p...
In an embodiment, a method of testing an error correction scheme includes selectively observing and controlling data at one or more intermediate test points within an error correction circuit. Erroneous data may be selectively injected at a first intermediate test point and data related to the erroneous data may be obs...
According to one embodiment, a memory system includes a plurality of memory devices and a memory controller operatively coupled to the memory devices. The memory controller is configured to partition write data into a plurality of data blocks, where each data block is associated with one of the memory devices. The memo...
An analysis method is disclosed for detecting a measurement error of operating parameters of a gas turbine. An embodiment of the method includes: obtaining multiple measured values of the operating parameters, the operating parameters being at least part of the variables of multiple functions, each of the functions inc...
Method and device for real-time error bounded and relay bounded map matching. The method for map matching comprises of modelling each road arc as a hidden state and each location measurement as an observation emitted by the hidden state using a Hidden Markov Model, decoding each road arc and each location measurement u...
Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bi...
A power amplifier controller circuit controls a power amplifier based upon an amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated amplitude of the output signal. The power amplifier controller circuit comprises an amplitude control loop and a phase...
A receiver circuit provides improved noise estimation processing by at least partially removing receiver frequency error bias. An initial noise estimate is compensated using an error term based on the observed receiver frequency error, and the resulting compensated noise estimate can be used to improve other signal pro...
Exemplary embodiments for providing multi-bit error correction based on a BCH code are provided. In one such embodiment, the following operations are repeatedly performed, including shifting each bit of the BCH code rightward by 1 bit while filling the bit vacated due to the rightward shifting in the BCH code with 0, c...
Systems and methods for error resilient transmission, rate control, and random access in video communication systems that use scalable video coding are provided. Error resilience is obtained by using information from low resolution layers to conceal or compensate loss of high resolution layer information. The same mech...
Rate adaptation is carried out using bit error rate (BER) to enable effective multimedia transmission. The BER can be estimated using signal strength in a MAC layer and modulation information (figures 7-9), and can be compatibly used in different wireless networks by means of message standardization....
Cette invention concerne un procédé permettant d'analyser un flux de signaux numériques décodé. Ce procédé consiste à décoder un flux de signaux numériques décodé afin d'obtenir un flux numérique décodé puis à déterminer (305) l'opération de décodage dans une dimension N; N représentant ...
L'invention concerne un onduleur de pilotage d'un moteur électrique installé dans un véhicule routier. Cet onduleur comporte : au moins un capteur pour mesurer au moins une tension et au moins un courant au sein de l'onduleur, des moyens de stockage pour enregistrer les valeurs mesurées sur un tour éle...
A bit error measurement system provides means for generating test patterns, multiplexing means and means for specifying and recording a pattern position. In a first aspect, a bit error measurement system has a pattern generator having M channels of pattern generation and a pattern generation controller 10 for controlli...
In an adaptive A/D converting device for adaptively converting an input analog signal (Vin) into an output digital signal (Dout), a reference voltage generating unit (11) generates lower and higher limit reference voltages (Vrl, Vrh) with a predetermined difference voltage (Vd) kept therebetween. A main A/D conversion ...
An aspheric lens exhibiting varying optical power as a function of locating along the longitudinal axis of the lens is intended for use in an electrophotographic printer of the type having a mirror for providing tilt error and scan bow error correction of a laser beam to be imaged at a photoconductor surface....